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Portions from Application-Specific Integrated Circuits Copyright 1997 by Addison Wesley Longman, Inc.

B.2  Verilog HDL Syntax

always_construct ::= [94] [95LRM 9.9.2] always statement [1]

binary_base ::= [4] [95LRM 2.5.1] ’b | ’B [2]

binary_digit ::= [4] [95LRM 2.5.1] x | X | z | Z | 0 | 1 [3]

binary_number ::= [114] [95LRM 2.5.1] [4]

[ size ] binary_base binary_digit { _ | binary_digit }

binary_operator ::= [19, 52] [95LRM 4.1.2] [5]

+   |   -   |   *   |   /   |   %   |   ==   |   !=   |   ===   |   !==   |   &&   |   ||   

|   <   |   <=   |   >   |   >=   |   &   |   |   |   ^   |   ^~   |   ~^   |   >>   |   <<   

blocking assignment 1 ::= [181] [95LRM 9.2.1] [6]

reg_lvalue = [ delay_or_event_control ] expression

block_item_declaration ::= [57, 133, 166, 190] [95LRM 9.8.1] [7]

parameter_declaration | reg_declaration

| integer_declaration | real_declaration | time_declaration

| realtime_declaration | event_declaration

case_item ::= [9] [95LRM 9.5] expression { , expression } : statement_or_null [8]

| default [ : ] statement_or_null

case_statement ::= [181] [95LRM 9.5] [9]

| case ( expression ) case_item { case_item } endcase

| casez ( expression ) case_item { case_item } endcase

| casex ( expression ) case_item { case_item } endcase

charge_strength ::= [107] [95LRM 3.4.1] ( small ) | ( medium ) | ( large ) [10]

cmos_switchtype ::= [58] [95LRM 7.7] cmos | rcmos [11]

cmos_switch_instance ::= [58] [95LRM 7.1] [ name_of_gate_instance ] [12]

( output_terminal , input_terminal ,

ncontrol_terminal , pcontrol_terminal )

combinational_body ::= [198] [95LRM 8.1.4] [13]

table combinational_entry { combinational_entry } endtable

combinational_entry ::= [13] [95LRM 8.1.4] level_input_list : output_symbol ; [14]

comment ::= [–] [95LRM 2.3] short_comment | long_comment [15]

comment_text ::= [88, 168] [95LRM 2.3] { Any_ASCII_character } [16]

concatenation ::= [21, 109, 146, 161] [95LRM 4.1.14] { expression { , expression } } [17]

conditional_statement ::= [181] [95LRM 9.4] [18]

| if ( expression ) statement_or_null [ else statement_or_null ]

constant_expression ::= [see Table B.1 ] [95LRM 4.1] constant_primary [19]

| unary_operator constant_primary

| constant_expression binary_operator constant_expression

| constant_expression ? constant_expression : constant_expression

| string

constant_mintypmax_expression ::= [34, 74, 139] [95LRM 4.3] constant_expression [20]

| constant_expression : constant_expression : constant_expression

constant_primary ::= [19] [95LRM 4.1] number | parameter _identifier [21]

| constant _concatenation | constant _multiple_concatenation

continuous_assign ::= [94] [95LRM 6.1] [22]

assign [ drive_strength ] [ delay3 ] list_of_net_assignments ;

controlled_timing_check_event ::= [189] [95LRM 14.5.11] [23]

timing_check_event_control

specify_terminal_descriptor [ &&& timing_check_condition ]

current_state ::= [165] [95LRM 8.1] level_symbol [24]

data_source_expression ::= [53, 127] [95LRM 13.3.3] expression [25]

decimal_base ::= [28] [95LRM 2.5.1] ’d | ’D [26]

decimal_digit ::= [206] [95LRM 2.5.1] 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 [27]

decimal_number ::= [114] [95LRM 2.5.1] [ sign ] unsigned_number [28]

| [ size ] decimal_base unsigned_number

delay2 ::= [58, 202] [95LRM 7.1, 7.15] [29]

# delay_value | # ( delay_value [ , delay_value ] )

delay3 ::= [22, 58, 107] [95LRM 7.1, 7.15] [30]

# delay_value | # ( delay_value [ , delay_value [ , delay_value ] ] )

delay_control ::= [32] [95LRM 9.7, 9.7.1] [31]

# delay_value | # ( mintypmax_expression )

delay_or_event_control ::= [6, 112, 148] [95LRM 9.7] [32]

delay_control | event_control | repeat ( expression ) event_control

delay_value ::= [29, 30, 31] [95LRM 7.1.3, 7.15] [33]

unsigned_number | parameter_identifier | constant_mintypmax_expression

description ::= [173] [95LRM 8.1, 12.1] module_declaration | udp_declaration [34]

disable_statement 2 ::= [181] [95LRM 11] [35]

| disable task _identifier ; | disable block _identifier ;

drive_strength ::= [22, 58, 107, 202] [95LRM 3.2.1, 3.4.2, 6.1.4] [36]

( strength0 , strength1 ) | ( strength1 , strength0 )

| ( strength0 , highz1 ) | ( strength1 , highz0 )

| ( highz1 , strength0 ) | ( highz0 , strength1 )

edge_control_specifier 3 ::= [196] [95LRM 14.5.9] edge [37]

[ edge_descriptor [ , edge_descriptor ] ]

edge_descriptor ::= [37] [95LRM 14.5.9] 01 | 10 | 0x | x1 | 1x | x0 [38]

edge_identifier ::= [53, 127] [95LRM 14.5.9] posedge | negedge [39]

edge_indicator ::= [41] [95LRM 8.1, 8.1.6, 8.4] [40]

( level_symbol level_symbol ) | edge_symbol

edge_input_list ::= [167] [95LRM 8.1, 8.1.6, 8.4] [41]

{ level_symbol } edge_indicator { level_symbol }

edge_sensitive_path_declaration ::= [138, 183] [95LRM 13.3.3] [42]

parallel_edge_sensitive_path_description = path_delay_value

| full_edge_sensitive_path_description = path_delay_value

edge_symbol ::= [40] [95LRM 8.1.6] r | R | f | F | p | P | n | N | * [43]

enable_gatetype ::= [58] [95LRM 7.1] bufif0 | bufif1 | notif0 | notif1 [44]

enable_gate_instance ::= [58] [95LRM 7.1] [ name_of_gate_instance ] [45]

( output_terminal , input_terminal , enable_terminal )

enable_terminal ::= [ 45, 98, 134] [95LRM 7.1] scalar _expression [46]

escaped_identifier ::= [63] [95LRM 2.7.1] [47]

\ {Any_ASCII_character_except_white_space} white_space

event_control ::= [32] [95LRM 9.7] @ event _identifier | @ ( event_expression ) [48]

event_declaration ::= [7, 95] [95LRM 9.7.3] [49]

event event _identifier { , event _identifier } ;

event_expression ::= [48, 50] [95LRM 9.7] expression | event _identifier [50]

| posedge expression | negedge expression

| event_expression or event_expression

event_trigger 4 ::= [181] [95LRM 9.7.3] | -> event _identifier ; [51]

expression ::= [see Table B.1 ] [95LRM 4] primary | unary_operator primary [52]

| expression binary_operator expression | expression ? expression : expression

| string

full_edge_sensitive_path_description 5 ::= [42] [95LRM 13.3.2] [53]

( [ edge_identifier ] list_of_path_inputs *>

list_of_path_outputs

[ polarity_operator ] : data_source_expression ) )

full_path_description ::= [171] [95LRM 13.3.2, 13.3.5] [54]

( list_of_path_inputs [ polarity_operator ] *> list_of_path_outputs )

function_call ::= [146] [95LRM 10.3.3] [55]

function _identifier ( expression { , expression} )

| name_of_system_function [ ( expression { , expression} ) ]

function_declaration ::= [95] [95LRM 10.3.1] [56]

function [ range_or_type ] function _identifier ;

function_item_declaration { function_item_declaration }

statement

endfunction

function_item_declaration ::= [56] [95LRM 10.3.1] [57]

block_item_declaration | input_declaration

gate_instantiation 6 ::= [94] [95LRM 7.1] n_input_gatetype [ drive_strength ] [58]

[delay2] n_input_gate_instance { , n_input_gate_instance } ;

| n_output_gatetype [ drive_strength ] [ delay2 ]

n_output_gate_instance { , n_output_gate_instance } ;

| enable_gatetype [ drive_strength ] [ delay3 ]

enable_gate_instance { , enable_gate_instance} ;

| mos_switchtype [ delay3 ]

mos_switch_instance { , mos_switch_instance } ;

| pass_switchtype pass_switch_instance { , pass_switch_instance } ;

| pass_en_switchtype [ delay3 ]

pass_en_switch_instance { , pass_en_switch_instance } ;

| cmos_switchtype [ delay3 ]

cmos_switch_instance { , cmos_switch_instance } ;

| pullup [ pullup_strength ]

pull_gate_instance { , pull_gate_instance } ;

| pulldown [ pulldown_strength ]

pull_gate_instance { , pull_gate_instance } ;

hex_base ::= [61] [95LRM 2.5.1] ’h | ’H [59]

hex_digit ::= [61] [95LRM 2.5.1] [60]

x | X | z | Z | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9

| a | b | c | d | e | f | A | B | C | D | E | F

hex_number ::= [114] [95LRM 2.5.1] [ size ] hex_base hex_digit { _ | hex_digit } [61]

identifier ::= [see Table B.1 ] [95LRM 2.7] IDENTIFIER [ { . IDENTIFIER } ] [62]

The period in identifier may not be preceded or followed by a space.

IDENTIFIER ::= [62] [95LRM 2.7] simple_identifier | escaped_identifier [63]

initial_construct ::= [94] [95LRM 9.9.1] initial statement [64]

init_val ::= [200] [95LRM 8.1, 8.5] [65]

1’b0 | 1’b1 | 1’bx | 1’bX | 1’B0 | 1’B1 | 1’Bx | 1’BX | 1 | 0

inout_declaration ::= [95, 190] [95LRM 12.3.2] [66]

inout [ range ] list_of_port_identifiers ;

inout_terminal ::= [134, 137] [95LRM 7.1] [67]

terminal _identifier | terminal _identifier [ constant_expression ]

input_declaration ::= [57, 95, 203] [95LRM 12.3.2] [68]

input [ range ] list_of_port_identifiers ;

input_identifier ::= [175] [95LRM 13.3.2] [69]

input_port _identifier | inout_port _identifier

input_terminal ::= [12, 45, 98, 116, 118] [95LRM 7.1] scalar _expression [70]

integer_declaration ::= [7, 95] [95LRM 3.9] integer list_of_register_identifiers ; [71]

level_input_list ::= [14, 167] [95LRM 8.1, 8.1.6] level_symbol { level_symbol } [72]

level_symbol ::= [24, 40, 41, 72] [95LRM 8.1, 8.1.6] 0 | 1 | x | X | ? | b | B [73]

limit_value ::= [152] [95LRM 13.7] constant_mintypmax_expression [74]

list_of_module_connections ::= [92] [95LRM 12.1.2, 12.3.3, 12.3.4] [75]

ordered_port_connection { , ordered_port_connection }

| named_port_connection { , named_port_connection }

list_of_net_assignments ::= [22] [95LRM 3.10] net_assignment { , net_assignment } [76]

list_of_net_decl_assignments ::= [107] [95LRM 3.2.1] [77]

net_decl_assignment { , net_decl_assignment }

list_of_net_identifiers ::= [107] [95LRM 2.7] net _identifier { , net _identifier } [78]

list_of_param_assignments ::= [129, 130] [95LRM 3.10] [79]

param_assignment { , param_assignment }

list_of_path_delay_expressions ::= [140] [95LRM 13.4] [80]

t _path_delay_expression

| trise _path_delay_expression , tfall _path_delay_expression

| trise _path_delay_expression , tfall _path_delay_expression , tz _path_delay_expression

| t01 _path_delay_expression , t10 _path_delay_expression , t0z _path_delay_expression ,

tz1 _path_delay_expression , t1z _path_delay_expression , tz0 _path_delay_expression

| t01 _path_delay_expression , t10 _path_delay_expression , t0z _path_delay_expression ,

tz1 _path_delay_expression , t1z _path_delay_expression , tz0 _path_delay_expression ,

t0x _path_delay_expression , tx1 _path_delay_expression , t1x _path_delay_expression ,

tx0 _path_delay_expression , txz _path_delay_expression , tzx _path_delay_expression

list_of_path_inputs ::= [53, 54] [95LRM 13.3.2] [81]

specify_input_terminal_descriptor { , specify_input_terminal_descriptor }

list_of_path_outputs ::= [53, 54] [95LRM 13.3.2] [82]

specify_output_terminal_descriptor { , specify_output_terminal_descriptor }

list_of_ports ::= [91] [95LRM 12] ( port { , port } ) [83]

list_of_port_identifiers ::= [66, 68, 123] [95LRM 12.3.2] [84]

port _identifier { , port _identifier }

list_of_real_identifiers ::= [155, 156] [95LRM 2.7] [85]

real _identifier { , real _identifier }

list_of_register_identifiers ::= [71, 160, 193] [95LRM 3.2.2] [86]

register_name { , register_name }

list_of_specparam_assignments ::= [180] [95LRM 13.2] [87]

specparam_assignment { , specparam_assignment }

long_comment ::= [15] [95LRM 2.3] /* comment_text */ [88]

loop_statement ::= [181] [95LRM 9.6] [89]

| forever statement

| repeat ( expression ) statement

| while ( expression ) statement

| for ( reg_assignment ; expression ; reg_assignment ) statement

mintypmax_expression ::= [31, 146] [95LRM 4.3] expression [90]

| expression : expression : expression

module_declaration ::= [34] [95LRM 12.1] module_keyword module _identifier [91]

[ list_of_ports ] ; {module_item } endmodule

module_instance ::= [93] [95LRM 12.1, 12.1.2] [92]

name_of_instance ( [ list_of_module_connections ] )

module_instantiation ::= [94] [95LRM 12.1.2] [93]

module _identifier [ parameter_value_assignment ]

module_instance { , module_instance } ;

module_item ::= [91] [95LRM 12.1] [94]

module_item_declaration | parameter_override

| continuous_assign | gate_instantiation | udp_instantiation

| module_instantiation | specify_block | initial_construct

| always_construct

module_item_declaration ::= [94] [95LRM 12.1] [95]

parameter_declaration | input_declaration

| output_declaration | inout_declaration | net_declaration

| reg_declaration | integer_declaration | real_declaration

| time_declaration | realtime_declaration | event_declaration

| task_declaration | function_declaration

module_keyword ::= [91] [95LRM 12.1] module | macromodule [96]

mos_switchtype ::= [58] [95LRM 7.1, 7.5] nmos | pmos | rnmos | rpmos [97]

mos_switch_instance ::= [58] [95LRM 7.1] [98]

[ name_of_gate_instance ] ( output_terminal , input_terminal , enable_terminal )

multiple_concatenation 7 ::= [21, 146] [95LRM 4.1.14] [99]

{ expression { expression { , expression } } }

named_port_connection ::= [75] [95LRM 12.1.2, 12.3.4] [100]

. port _identifier ( [ expression ] )

name_of_gate_instance ::= [12, 45, 98, 116, 118, 134, 137, 151] [95LRM 7.1] [101]

gate_instance _identifier [ range ]

name_of_instance ::= [92] [95LRM 12.1.2] module_instance _identifier [ range ] [102]

name_of_system_function ::= [55] [95LRM 14] $ identifier [103]

Note: the $ in name_of_system_function may not be followed by a space.

name_of_udp_instance ::= [201] [95LRM 8.6] udp_instance _identifier [ range ] [104]

ncontrol_terminal ::= [12] [95LRM 7.1] scalar _expression [105]

net_assignment ::= [76, 147] [95LRM 6.1, 9.3] net_lvalue = expression [106]

net_declaration ::= [95] [95LRM 3.2.1] [107]

net_type [ vectored | scalared ] [ range ] [ delay3 ] list_of_net_identifiers ;

| trireg [ vectored | scalared ]

[ charge_strength ] [ range ] [ delay3 ] list_of_net_identifiers ;

| net_type [ vectored | scalared ]

[drive_strength] [range] [delay3] list_of_net_decl_assignments ;

net_decl_assignment ::= [77] [95LRM 3.2.1] net _identifier = expression [108]

net_lvalue ::= [106, 147] [95LRM 6.1] [109]

net _identifier | net _identifier [ expression ]

| net _identifier [ msb _constant_expression : lsb _constant_expression ]

| net _concatenation

net_type ::= [107] [95LRM 3.2.1] [110]

wire | tri | tri1 | supply0 | wand | triand | tri0 | supply1 | wor | trior

next_state ::= [165] [95LRM 8.1, 8.1.6] output_symbol | - [111]

non-blocking assignment 8 ::= [181] [95LRM 9.2.2] [112]

reg_lvalue <= [ delay_or_event_control ] expression

notify_register ::= [189] [95LRM 14.5.10] register _identifier [113]

number ::= [21, 146] [95LRM 2.5] [114]

decimal_number | octal_number | binary_number | hex_number | real_number

n_input_gatetype ::= [58] [95LRM 7.1] and | nand | or | nor | xor | xnor [115]

n_input_gate_instance ::= [58] [95LRM 7.1] [116]

[ name_of_gate_instance ] ( output_terminal , input_terminal { , input_terminal } )

n_output_gatetype ::= [58] [95LRM 7.1] buf | not [117]

n_output_gate_instance ::= [58] [95LRM 7.1] [118]

[ name_of_gate_instance ] ( output_terminal { , output_terminal } , input_terminal )

octal_base ::= [121] [95LRM 2.5.1] ’o | ’O [119]

octal_digit ::= [121] [95LRM 2.5.1] [120]

x | X | z | Z | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7

octal_number ::= [114] [95LRM 2.5.1] [121]

[ size ] octal_base octal_digit { _ | octal_digit}

ordered_port_connection ::= [75] [95LRM 12.1.2, 12.3.3] [ expression ] [122]

output_declaration ::= [95, 190, 203] [95LRM 12.3.2] [123]

output [ range ] list_of_port_identifiers ;

output_identifier ::= [177] [95LRM 13.3.2] [124]

output_port _identifier | inout_port _identifier

output_symbol ::= [14, 111] [95LRM 8.1, 8.1.6] 0 | 1 | x | X [125]

output_terminal ::= [12, 45, 98, 116, 118, 151] [95LRM 7.1] [126]

terminal _identifier | terminal _identifier [ constant_expression ]

parallel_edge_sensitive_path_description 9 ::= [42] [95LRM 13.3.2] [127]

( [ edge_identifier ] specify_input_terminal_descriptor =>

specify_output_terminal_descriptor

[ polarity_operator ] : data_source_expression ) )

parallel_path_description ::= [171] [95LRM 13.3.2] [128]

( specify_input_terminal_descriptor

[ polarity_operator ] => specify_output_terminal_descriptor )

parameter_declaration ::= [7, 95] [95LRM 3.10] [129]

parameter list_of_param_assignments ;

parameter_override ::= [94] [95LRM 12.2] defparam list_of_param_assignments ; [130]

parameter_value_assignment ::= [93] [95LRM 12.1.2] [131]

# ( expression { , expression } )

param_assignment ::= [79] [95LRM 3.10] parameter _identifier = constant_expression [132]

par_block ::= [181] [95LRM 9.8.2] [133]

fork [ : block _identifier { block_item_declaration } ] { statement } join

pass_enable_switch_instance 10 ::= [58] [95LRM 7.1] [134]

[ name_of_gate_instance ] ( inout_terminal , inout_terminal , enable_terminal )

pass_en_switchtype ::= [58] [95LRM 7.1] [135]

tranif0 | tranif1 | rtranif1 | rtranif0

pass_switchtype ::= [58] [95LRM 7.1] tran | rtran [136]

pass_switch_instance ::= [58] [95LRM 7.1] [137]

[ name_of_gate_instance ] ( inout_terminal , inout_terminal )

path_declaration 11 ::= [176] [95LRM 13.3] simple_path_declaration ; [138]

| edge_sensitive_path_declaration ; | state-dependent_path_declaration ;

path_delay_expression ::= [80] [95LRM 13.4] constant_mintypmax_expression [139]

path_delay_value ::= [42, 171] [95LRM 13.4] [140]

list_of_path_delay_expressions | ( list_of_path_delay_expressions )

pcontrol_terminal ::= [12] [95LRM 7.1] scalar _expression [141]

polarity_operator ::= [53, 54, 127, 128] [95LRM 13.3.2] + | - [142]

port ::= [83] [95LRM 12.3.1] [143]

[ port_expression ] | . port _identifier ( [ port_expression ] )

port_expression ::= [143] [95LRM 12.3.1] [144]

port_reference | { port_reference { , port_reference } }

port_reference ::= [144] [95LRM 12.3.1] port _identifier [145]

| port _identifier [ constant_expression ]

| port _identifier [ msb _constant_expression : lsb _constant_expression ]

primary ::= [52] [95LRM 4] number | identifier | identifier [ expression ] [146]

| identifier [ msb _constant_expression : lsb _constant_expression ]

| concatenation | multiple_concatenation | function_call

| ( mintypmax_expression )

procedural_continuous_assignment 12 ::= [181] [95LRM 9.3] [147]

| assign reg_assignment ;

| deassign reg_lvalue ; | force reg_assignment ;

| force net_assignment ; | release reg_lvalue ;

| release net_lvalue ;

procedural_timing_control_statement ::= [181] [95LRM 9.7] [148]

delay_or_event_control statement_or_null

pulldown_strength ::= [58] [95LRM 7.1] ( strength0 , strength1 ) [149]

| ( strength1 , strength0 ) | ( strength0 )

pullup_strength ::= [58] [95LRM 7.1] ( strength0 , strength1 ) [150]

| ( strength1 , strength0 ) | ( strength1 )

pull_gate_instance ::= [58] [95LRM 7.1] [ name_of_gate_instance ] ( output_terminal ) [151]

pulse_control_specparam 13 ::= [179] [95LRM 13.7] [152]

PATHPULSE$ = ( reject _limit_value [ , error _limit_value ] ) ;

| PATHPULSE$ specify_input_terminal_descriptor $ specify_output_terminal_descriptor

= ( reject _limit_value [ , error _limit_value ] ) ;

range ::= [66, 68, 101, 102, 104, 107, 123, 154, 160] [95LRM 7.1.5][153]

[ msb _constant_expression : lsb _constant_expression ]

range_or_type ::= [56] [95LRM 10.3.1] [154]

range | integer | real | realtime | time

realtime_declaration ::= [7, 95] [95LRM 3.9] realtime list_of_real_identifiers ; [155]

real_declaration ::= [7, 95] [95LRM 3.9] real list_of_real_identifiers ; [156]

real_number 14 ::= [114] [95LRM 2.5.1] [157]

[ sign ] unsigned_number . unsigned_number

| [ sign ] unsigned_number [ . unsigned_number] e [ sign ] unsigned_number

| [ sign ] unsigned_number [ . unsigned_number] e [ sign ] unsigned_number

register_name ::= [86] [95LRM 3.2.2] register _identifier [158]

| memory _identifier [ upper_limit _constant_expression :

lower_limit _constant_expression ]

reg_assignment ::= [89, 147] [95LRM 9.3] reg_lvalue = expression [159]

reg_declaration ::= [7, 95, 203] [95LRM 3.2.2] [160]

reg [ range ] list_of_register_identifiers ;

reg_lvalue ::= [6, 112, 147, 159] [95LRM 9.2.1] [161]

reg _identifier | reg _identifier [ expression ]

| reg _identifier [ msb _constant_expression : lsb _constant_expression ]

| reg _concatenation

scalar_constant ::= [163] [95LRM 2.5.1] [162]

1’b0 | 1’b1 | 1’B0 | 1’B1 | ’b0 | ’b1 | ’B0 | ’B1 | 1 | 0

scalar_timing_check_condition ::= [194] [95LRM 14.5.11] expression [163]

| ~ expression | expression == scalar_constant

| expression === scalar_constant

| expression != scalar_constant

| expression !== scalar_constant

sequential_body ::= [198] [95LRM 8.1, 8.1.4] [ udp_initial_statement ] [164]

table sequential_entry { sequential_entry } endtable

sequential_entry ::= [164] [95LRM 8.1, 8.3, 8.4] [165]

seq_input_list : current_state : next_state ;

seq_block ::= [181] [95LRM 9.8.1] begin [ : block _identifier [166]

{ block_item_declaration } ] { statement } end

seq_input_list ::= [165] [95LRM 8.1] level_input_list | edge_input_list [167]

short_comment ::= [15] [95LRM 2.3] // comment_text \n [168]

sign ::= [28, 157] [95LRM 2.5.1] + | - [169]

simple_identifier ::= [63] [95LRM 2.7] [ a-zA-Z ][ a-zA-Z_$ ] [170]

simple_path_declaration ::= [138, 183] [95LRM 13.3.2] [171]

parallel_path_description = path_delay_value

| full_path_description = path_delay_value

size ::= [4, 28, 61, 121] [95LRM 2.5.1] unsigned_number [172]

source_text ::= [–] [95LRM 2.1] { description } [173]

specify_block ::= [94] [95LRM 13.1] specify [ specify_item ] endspecify [174]

specify_input_terminal_descriptor ::= [81, 127, 128, 152, 178] [95LRM 13.3.2] [175]

input_identifier

| input_identifier [ constant_expression ]

| input_identifier [ msb _constant_expression : lsb _constant_expression ]

specify_item ::= [174] [95LRM 13.1] [176]

specparam_declaration | path_declaration | system_timing_check

specify_output_terminal_descriptor ::= [82, 127, 128, 152, 178] [95LRM 13.3.2][177]

output_identifier

| output_identifier [ constant_expression ]

| output_identifier [ msb _constant_expression : lsb _constant_expression ]

specify_terminal_descriptor ::= [23, 195] [95LRM 13.3.2] [178]

specify_input_terminal_descriptor

| specify_output_terminal_descriptor

specparam_assignment ::= [87] [95LRM 13.2] [179]

specparam _identifier = constant_expression | pulse_control_specparam

specparam_declaration ::= [176] [95LRM 13.2] [180]

specparam list_of_specparam_assignments ;

statement 15 ::= [1, 56, 64, 89, 133, 166, 182] [95LRM 9.1] [181]

blocking_assignment ; | non_blocking assignment ;

| procedural_continuous_assignments ;

| procedural_timing_control_statement | conditional_statement

| case_statement | loop_statement | wait_statement

| disable_statement | event_trigger | seq_block | par_block

| task_enable | system_task_enable

statement_or_null 16 ::= [8, 18, 148, 191, 207] [95LRM 9.1] [182]

statement | ;

state_dependent_path_declaration 17 ::= [138] [95LRM 13.3.4] [183]

if ( conditional_expression ) simple_path_declaration

| if ( conditional_expression ) edge_sensitive_path_declaration

| ifnone simple_path_declaration

strength0 ::= [36, 149, 150] [95LRM 7.10] [184]

supply0 | strong0 | pull0 | weak0

strength1 ::= [36, 149, 150] [95LRM 7.10] [185]

supply1 | strong1 | pull1 | weak1

string ::= [19] [95LRM 2.6] " { Any_ASCII_Characters_except_new_line } " [186]

system_task_enable ::= [181] [95LRM 2.7.3] [187]

system_task_name [ ( expression { , expression } ) ] ;

system_task_name ::= [187] [95LRM 2.7.3] $ identifier [188]

Note: The $ may not be followed by a space.

system_timing_check 18 ::= [176] [95LRM 14.5] [189]

$setup ( timing_check_event , timing_check_event ,

timing_check_limit [ , notify_register ] ) ;

| $hold ( timing_check_event , timing_check_event ,

timing_check_limit [ , notify_register ] ) ;

| $period ( controlled_timing_check_event , timing_check_limit

[ , notify_register ] ) ;

| $width ( controlled_timing_check_event , timing_check_limit ,

constant_expression [ , notify_register ] ) ;

| $skew ( timing_check_event , timing_check_event ,

timing_check_limit [ , notify_register ] ) ;

| $recovery ( controlled_timing_check_event , timing_check_event ,

timing_check_limit [ , notify_register ] ) ;

| $setuphold ( timing_check_event , timing_check_event ,

timing_check_limit , timing_check_limit [ , notify_register ] ) ;

task_argument_declaration 19 ::= [191?] [95LRM 10.2.1] [190]

block_item_declaration | output_declaration | inout_declaration

task_declaration 20 ::= [95] [95LRM 10.2.1] [191]

task task _identifier ; {task_item_declaration} statement_or_null endtask

task_enable ::= [181] [95LRM 10.2.2] [192]

task _identifier [ ( expression { , expression } ) ] ;

time_declaration ::= [7, 95] [95LRM 3.9] time list_of_register_identifiers ; [193]

timing_check_condition ::= [23, 195] [95LRM 14.5.11] [194]

scalar_timing_check_condition | ( scalar_timing_check_condition )

timing_check_event ::= [189] [95LRM 14.5] [195]

[ timing_check_event_control ]

specify_terminal_descriptor [ &&& timing_check_condition ]

timing_check_event_control ::= [23, 195] [95LRM 14.5] [196]

posedge | negedge | edge_control_specifier

timing_check_limit ::= [189] [95LRM 14.5] expression [197]

udp_body ::= [199] [95LRM 8.1] combinational_body | sequential_body [198]

udp_declaration ::= [34] [95LRM 8.1, 8.1.1] [199]

primitive udp _identifier ( udp_port_list ) ;

udp_port_declaration { udp_port_declaration } udp_body

endprimitive

udp_initial_statement ::= [164] [95LRM 8.1, 8.5] [200]

initial udp_output_port _identifier = init_val ;

udp_instance ::= [202] [95LRM 8.6] [201]

[ name_of_udp_instance ]

( output_port_connection , input_port_connection { , input_port_connection } )

udp_instantiation ::= [94] [95LRM 8.6] [202]

udp _identifier [ drive_strength ] [ delay2 ] udp_instance { , udp_instance } ;

udp_port_declaration ::= [199] [95LRM 8.1] [203]

output_declaration | input_declaration | reg_declaration

udp_port_list ::= [199] [95LRM 8.1, 8.1.2] [204]

output_port _identifier , input_port _identifier { , input_port _identifier }

unary_operator ::= [19, 52] [95LRM 4.1] [205]

+ | - | ! | ~ | & | ~& | | | ~| | ^ | ~^ | ^~

unsigned_number ::= [28, 33, 157, 172] [95LRM 2.5.1] [206]

decimal_digit { _ | decimal_digit }

wait_statement 21 ::= [181] [95LRM 9.7.5] [207]

| wait ( expression ) statement_or_null

white_space ::= [47] [95LRM 2.2] space | tab | newline [208]


1. The term blocking (space) assignment is referenced as blocking (underscore) assignment .

2. The construct for disable_statement has a leading vertical bar, | , in Annex A of the 95 LRM.

3. The outer brackets in term edge_control_specifier are lexical elements; the inner brackets are an optional item.

4. The construct for event_trigger has a leading vertical bar, |, in Annex A of the 95 LRM.

5. The term full_edge_sensitive_path_description contains an unmatched right parenthesis in Annex A and Section 13.3.3 of the 95 LRM. The examples in Section 13.3.3 of the 95 LRM do not include the final trailing right parenthesis.

6. The term pass_en_switch_instance is defined as pass_enable_switch_instance .

7. The two sets of outer braces (four) in the term multiple_concatenation are lexical elements; the inner braces (two) indicate an optional item.

8. The term, non (hyphen) blocking (space) assignment , is referenced as non (underscore) blocking (space) assignment .

9. The term parallel_edge_sensitive_path_description has an unmatched right parenthesis in Annex A and Section 13.3.3 of the 95 LRM. The examples in Section 13.3.3 do not include the final trailing right parenthesis.

10. The term pass_enable_switch_instance is referenced as pass_en_switch_instance .

11. The term state-dependent_path_declaration is defined as state_dependent_path_declaration .

12. The construct for procedural_continuous_assignment has a leading vertical bar, | , in Annex A of the 95 LRM.

13. The specparam PATHPULSE$ is shown in bold in the 95 LRM but is not a keyword.

14. The term real_number has identical entries for the two forms of scientific notation in Annex A of the 95 LRM. In Section 2.5 of the 95 LRM the last alternative uses E (uppercase) instead of e (lowercase).

15. The term blocking (underscore) assignment is defined as blocking (space) assignment . The term non (underscore) blocking (space) assignment is a single term defined as non (hyphen) blocking (space) assignment . The term procedural_continuous_assignments (plural) is defined as procedural_continuous_assignment (singular).

16. The term statement_or_null is equivalent to a statement term (which, when expanded, will be terminated by a semicolon) or the combination of nothing (null) followed by a semicolon.

17. The term state_dependent_path_declaration is referenced as
state-dependent_path_declaration .

18. The names of the system timing check tasks are shown in bold in the 95 LRM but are not keywords.

19. Annex A of the 95 LRM defines task_argument_declaration , which is not referenced in Annex A; see the footnote for the term task_declaration .

20. Annex A and Section 10.2.1 of the 95 LRM define task_declaration using the term task_item_declaration , which is not defined in Annex A. Section 10.2.1 defines task_item_declaration similarly to the Annex A definition of task_argument_declaration , but with the addition of the alternative term input_declaration .

21. The construct for wait_statement has a leading vertical bar, | , in Annex A of the 95 LRM.


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